CPU Memory Performance Architect
Who are we? Toga Networks is Huawei's innovation center in Israel, creating exceptional technologies that shape the future of communications and smart devices. Huawei's innovative ICT solutions, products and services are used in more than 170 countries and regions, serving over one-third of the world's population. Our company is composed of focused teams that function as independent thinkers, diligently exploring and uncovering future technologies that can cater to the diverse needs of Huawei's customers worldwide. Join us in shaping the next generation of transformative solutions for the world of communications. Job Description Toga Networks is looking for an architect to work on the invention and development of new SW visible CPU technologies to improve performance of SW scenarios related to memory ordering, memory coherency, multithreading, synchronization, memory safety, caching, etc. The minimal tasks of this role are: 1. Modeling of new memory related architectural features in the existing CPU performance simulator 2. Development of performance tests or adaptation of existing workloads to be suitable for simulation 3. Conducting performance studies for the workloads of choice either in the performance simulator or on a real chip 4. Develop analysis, conclusions and recommendations based on the above activities The role can comprehend much more than that depending on the skills, talent and experience of the candidate creating a career path over time. For example, to invent new instructions and mechanisms to overcome significant performance bottlenecks in these areas, refinement and further development of ideas provided by others. Possible participation in development in additional domains If you want to be part of something bigger, if you are a team player with excellent communication skills and motivation to revolutionize data-center technology, you’re welcome on board! Requirements Four or more years of experience in one or more of the following roles in the memory cluster of an Out of Order CPUs: • Architecture or micro-architecture definition. • Performance modeling and studies. • RTL implementation. • Verification of Multithreading. Education: Academic degree in Computer Engineering or Computer Science Advantages: • Knowledge and experience in memory ordering architecture. • HW or SW Experience in inter-thread synchronization. • Knowledge of the arm Instruction Set Architecture. Skills • Good verbal English skills. • Good interpersonal skills • Team player
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